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UART
UART Verification IP provides an smart way to verify the UART component of a SOC or a ASIC. The Sibridge UART Verification IP is fully compliant with standard UART 16550 Specification and provides the following features.

UART VIP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env


Features
  • Fully compatible with 16550
  • Transmit and receive commands allow the user to transmit and receive UART data
  • Support additional functionality of RS232 and GPIO
  • Full duplex operation
  • Fully configurable serial interface
     



  • SystemVerilog Source Code
  • User Guide and Release Notes
  • Sanity Testcases
  • Test Plan + Coverage Plan [Upon Request]
  • Examples on topological usage
  • Sample Verification Environmenttion