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Verification IP
- Reusable blocks and infrastructure to reduce the development time
- Tool agnostic library & methodology for tool independent VIP development.
- Strong guidelines and memory profiling for better simulation run time
- More robust verification including interoperability for easy integration to actual SoC Environment
- Extensive experience in
o Industry std. interfaces like USB, PCI Express, Ethernet, PCI, HDMI, SATA
o Develop Verification IP using different languages and methodologies
System Verilog VIP using VMM or AVM
- Assertion IP development using SVA, PSL or OVA.
- Design IP validation using different VIPs
- IP development for standard or proprietary interface
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- Micro Architecture Design
- Design IP Development
- Verification IP Development
- IP integration
- FPGA based systems design
- ASIC/SoC Prototyping
- Pre and Post Silicon Validation
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Sibridge Technologies
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India Office
301 Shivalik II, Above ICICI Bank,
132 Ft. Ring Road, Satellite,
Ahmedabad- 380015, Gujarat, India.
Phone: +91-79-4006 7637
Fax: +91-79-40067635
Email: info@sibridgetech.com
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U.S.A. Office
2350 Mission College Blvd.,
Suite 1070, Santa Clara,
CA 95054
Phone: +1-510 -279-3755
Fax: +1-510-225-1775
Email: info@sibridgetech.com
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