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Overview:
The SI-MI2CV provides an interface between a microprocessor and an I2C bus. It can be programmed to operate as either a master or a slave device and performs arbitration in master mode to allow it to operate in multi-master systems.
Features:
- Master or slave operation
- Multi-master systems supported
- Allows 10-bit addressing with I2C bus
- Performs arbitration and clock synchronization
- Own address and General Call address detection
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- Verilog Source code with lint checking
- Verilog functional testbench and associated documentation
- Design documentation
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