Overview
The Sibridge Ethernet (ETH) Verification IP is a reusable, configurable, pre-verified, plug-and-play verification component developed in System Verilog. It offers easy to use and complete verification solution for SoCs incorporating Ethernet MAC and PHY at module, chip and system level.
Features:
- Supports 10M/100M/1G/10G/40G/100G Ethernet Speeds
- Supports wide range of Ethernet Interfaces like: MII, GMII,RMII, RGMII, SGMII, XGMII/XAUI
- Fully compliant to IEEE std 802.3-2005
- Configurable MAC and PHY Mode
- Supports Full Duplex or Half duplex mode
- Supports the management interface for all supported interfaces (MDIO/MDC)
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- SystemVerilog Source Code
- User Guide and Release Notes
- Sanity Testcases
- Test Plan + Coverage Plan [Upon Request]
- Examples on topological usage
- Sample Verification Environmenttion
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Sibridge Technologies
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India Office
301 Shivalik II, Above ICICI Bank,
132 Ft. Ring Road, Satellite,
Ahmedabad- 380015, Gujarat, India.
Phone: +91-79-4006 7637
Fax: +91-79-40067635
Email: info@sibridgetech.com
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U.S.A. Office
2350 Mission College Blvd.,
Suite 1070, Santa Clara,
CA 95054
Phone: +1-510 -279-3755
Fax: +1-510-225-1775
Email: info@sibridgetech.com
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