ASIC Openings

Engineering Manager, Hardware

Job Opening #408

Primary Duties

Managing the global team that is responsible for IP development and customer release/support
Creating IP Roadmap in alignment with Marketing and Sales team and drive engineering organization to execute to aligned IP Roadmap
Actively participate in IP architecture development with engineering team
Ensuring delivery commitments like time to market and quality are met
Provide customer support for delivered products
Strategize and drive implementation of processes and methodologies to ensure efficient execution, design, optimization, and quality improvements
Provide pre and post-sales support to customers from engineering enablement point of view

Job Requirements

Bachelor’s or foreign academic equivalent in Computer Science, Computer Applications, Computer Engineering, or a related field required
Minimum 2-4 years related professional experience
Experience with chip design, defining verification methodologies, and architecting and developing module level and chip level verification
Detail orientated with excellent time management skills
Excellent written and verbal communication skills
Strong knowledge of UVM, VMM, eRM, RTL, Synthesis, STA UART, SPI, I2C, Fiber Channel, USB, SDR/DDR, JTAG, and FPGA architectures
     
Submit your resume now to hr@sibridgetech.com


ASIC Design Verification Engineer

Job Opening #407

Job Description

Responsible for completing verification of projects for ASIC solutions group.
Lead verification activities which include creating test plans, cover plans, test bench architecture, and test bench development. Participate in coverage implementation and analysis, architect verification environments, develop test cases and run regressions in order to execute verification projects.

Experience/Qualifications:

Experience with UVM, Specman, PCIe Gen2 and Gen3 IP and Subsystem Verification, and development of test vectors required. Bachelor’s or foreign academic equivalent in Computer Science, Electrical Engineering, Electronics & Communications Engineering or related field of study plus five (5) years of progressively responsible experience. Will accept a Master’s plus three (3) years of experience in lieu of BS + 5. May travel to unanticipated client sites throughout US.

Job Location

Verisure Technologies, Inc. dba Sibridge Technologies, 4699 Old Ironsides Dr, Suite 278, Santa Clara, CA 95054
     
Submit your resume now to hr@sibridgetech.com


Senior Design Engineer (Bangalore)

Job Opening #404 

Requirements:

  • Define IP architecture, lead the design effort, implementation and FPGA validation.
  • Take responsibility for developing design specifications, conducting hardware architecture and design tradeoffs.
  • Work in close collaboration with the team, customers and internal customers including ASIC Designers, Verification and Firmware.
  • Coordinate with Design Manager for product /service requirements and scheduling activities.
  • Prepare Project database according to release process upon completion of the project.
  • Write top level Design Document.
  • Write System level verification requirements.
  • Prepare Data Sheet and User Guide.
  • Work on-site/travel, as and when required.
  • Mentor junior engineers
Technical Skills
  • Verilog HDL
  • Logic Design
  • HDL (Verilog / VHDL)
  • PERL/TCL/Python scripting language
  • EDA Tools for Synthesize and simulation from leading EDA vendors
  • Knowledge of FPGA
Moderate Knowledge of 
  • Serial / Parallel Protocols: I2C, UART, AHB/AXI/PCI and Ethernet, PCIe, USB, MIPI, DDR/DDR2/DDR3
Interpersonal Skills 
  • Strong communication (verbal and written).
  • Team player
  • Self-motivated team player able to thrive in a fast-paced engineering environment
  • Exhibit leadership skills
  • Good in problem solving and decision making
Education Criteria 
  •  BS/MS  - Electronics and Communication OR
  • BS/MS  - Electronics and Electrical

Experience Required 
  •  5-8 Years

Submit your resume now to hr@sibridgetech.com


Senior Verification Engineer (Bangalore)

Job Opening #403 

Requirements:

  • Understand the standard/specification/application for which VIP is to be developed.
  • Define one or more VIP architecture, Feature list, Technical Datasheet.
  • Hand-on implementation work for every aspect of VIP development phases.
  • Responsible for the compliance with the latest Methodologies.
  • Define Verification Environment Architecture for VIP.
  • Define Functional Coverage matrix and Comprehensive Test plan.
  • Actively involve in review process at various phases of VIP development:  Documents, Code, VE and Test case etc.
  •  Develop and Maintain Product Documentation : User Guide, Presentation, Release Notes, Package Readme
  • Regression management and functional coverage closure for VIP underdevelopment.
  • Manage and track various product version releases. Track VIP/s support and fixes.
  • Work on- site / travel, as and when required for VIP support.
  • Build environment for verification of design IPs and verify the same.
  • Knowledge of system verification using FPGA prototyping is an advantage
Technical Skills
  • Verilog HDL
  • SystemVerilog HVL
  • Serial/Parallel Protocols: AHB/AXI/PCI and Ethernet, PCIe, USB , I2C, UART, SATA, MIPI, DDR/DDR2/DDR3
  • Methodology (OVM, VMM, UVM)
Moderate Knowledge of 
  • Vera
  • e
  • C++
Interpersonal Skills 
  • Good in communication (verbal and written).
  • Team player
  • Exhibit leadership skills

Education Criteria 
  •  BS / MS  - Electronics and Communication OR
  • BS / MS  - Computer Science
  • BS / MS  - Electronics and Electrical

Experience Required 
  •  5-8 Years

Submit your resume now to hr@sibridgetech.com


Verification Engineer (Bangalore)

Job Opening #402 

Requirements:

  • Understand the standard/specification/application for which VIP to be developed.
  • Develop the small blocks of the VIP from scratch or reuse from the available libraries or legacy code.
  • Develop Verification Environment Architecture, Test Plan and write test cases independently for VIP.
  • Test running infrastructure by writing script in PERL or any other scripting language.
  • Integrate various blocks of VIP make it compile and run with all the required simulators and methodologies.
  • Debug and identify issue and propose fix.
  • Regression and functional coverage closure for VIP underdevelopment.
  • Able to reproduce the issue for the issues client face at off-site.
  • Document the changes / update as per the VIP product development process.
  • Verification of design IPs
Technical Skills
  • Verilog HDL
  • SystemVerilog HVL
  • Methodology (OVM, VMM, UVM)
Moderate Knowledge of 
  •  Serial / Parallel Protocols: I2C, UART, AHB/AXI/PCI and Ethernet, PCIe, USB, MIPI
Interpersonal Skills 
  • Good in communication (verbal and written).
  • Team player

Education Criteria 
  •  BS/MS  - Electronics and Communication OR
  • BS/MS  - Computer Science
  • BS/MS  - Electronics and Electrical

Experience Required 
  •  3-5 Years

Submit your resume now to hr@sibridgetech.com


Design Engineer (Bangalore)

Job Opening #401 

Requirements:

  • Understand the standard/specification/application for which Design IP is to be developed.
  • Develop the small blocks of the IP from scratch or reuse from the available libraries or legacy code.
  • Do sanity verification of the IPs.
  • Integrate various blocks of IP and make it compile and run with all the required simulators
  • Debug and identify issue and propose fix.
  • Able to reproduce the issue for the issues client face at off-site.
  • Document the changes / update as per the IP development process.
Technical Skills
  •  Logic Design
  • HDL (Verilog / VHDL)
  • PERL/TCL/Python scripting language
  • EDA Tools for Synthesize and simulation from leading EDA vendors 
Moderate Knowledge of 
  •  Serial / Parallel Protocols: I2C, UART, AHB/AXI/PCI and Ethernet, PCIe, USB, MIPI
Interpersonal Skills 
  • Good in communication (verbal and written).
  • Team player

Education Criteria 
  •  BS/MS  - Electronics and Communication OR
  • BS/MS  - Electronics and Electrical

Experience Required 
  •  3-5 Years
Submit your resume now to hr@sibridgetech.com


Senior ASIC Verification Engineer (USA)

Job Opening #344

As a part of Sibridge’s dynamic U.S. team, you will lead verification projects for complex SoCs at some of Silicon Valley’s leading chip companies. In your role as the project leader at customer site, you will be responsible for defining the verification strategy, including environment, verification IPs, and methodology. You will direct an offshore team of engineers for test plan creation, test case development, coverage analysis, to ensure right-first-time-silicon for our customers. You will also have an opportunity to define and manage the development of advanced verification IPs.

Requirements:

  • 7+ yrs. of ASIC verification experience
  • Experience in defining complex verification environments and testbenches
  • Experience with HVLs (SystemVerilog, e, Vera) required
  • Familiarity with advanced methodologies for : coverage, assertion, hybrid language verification
  • Must possess excellent written & verbal communications skills
  • Must have prior experience leading an offshore team of engineers
Submit your resume now to hr@sibridgetech.com


Senior ASIC Verification Engineer (Ahmedabad)

Job Opening # 214

You will be responsible for defining the verification strategy, including environment, verification IPs, and methodology. Your team of engineers will handle test plan creation, test case development, coverage analysis, to ensure right-first-time-silicon for our customers.You will also have an opportunity to contribute towards gate-level simulation and silicon bring-up.

Requirements:

  • 5+ yrs. of ASIC verification experience
  • Experience in defining complex verification environments and testbenches
  • Familiarity with current methodologies : coverage, assertion, hybrid language verification
  • Experience with HVLs (SystemVerilog, e, Vera) required
  • Must possess excellent written & verbal communications skills
  • Some experience leading team of engineers preferred
Submit your resume now to hr@sibridgetech.com


ASIC Verification Engineer (Ahmedabad)

Job Opening #225

As part of a dynamic, motivated team, you will handle block and full-chip verification of some of most complex SoCs in the industry. You will work on various SoCs verification or Verification IP development or IP Verification activities. Your responsibilities may include VIP development or Module and full chip Verification, Test cases development, Function and code Coverage Analysis.

Requirements:

  • 3 to 5 years of experience in ASIC Verification or Verification IP development
  • Minimum 3 years of experience in verification
  • Very good debugging / problem solving skills.
  • Should be able to work on multiple projects simultaneously
  • Verilog, SystemVerilog, Methodology (OVM-VMM)
  • Serial / Parallel Protocols: AHB/AXI/PCI and Ethernet, PCIe, USB
  • Memory Technology DDR, NAND & Chip Level Verification
Submit your resume now to hr@sibridgetech.com


ASIC Design Engineer (Ahmedabad)

Job Opening #215

As part of a dynamic and motivated team, you will be involved in design architecture, RTL coding, IP integration, block level verification, Synthesis, timing analysis and FPGA porting.

Requirements:

  • 3 to 5 yrs. of ASIC Design/ IP Development experience
  • Hands-on experience in RTL Design, Synthesis, STA, CDC check, module level
  • verification, gate level simulation etc..
  • Knowledge of HDLs (Verilog/ VHDL) is must and HVLs (System Verilog) desirable
  • Familiarity with FPGA flow and debugging is plus
  • Superior analytical and problem solving skills
  • Must possess excellent written & verbal communications skills
Submit your resume now to hr@sibridgetech.com
 

ASIC Design Engineer | 5 to 8 years

Job Opening #216

As part of a dynamic and motivated team, you will be involved in design architecture, RTL coding, IP integration, block level verification, Synthesis, timing analysis and FPGA porting.

Requirements:

Technical:
  • Logic Design
  • HDL (Verilog / VHDL)
  • PERL/TCL/Python scripting language
  • EDA Tools for Synthesize and simulation from leading EDA vendors
Interpersonal skills:
  • Strong communication (verbal and written).
  • Team player
  • Self- starter and Self – motivated
  • Exhibits leadership skills

Key Responsibilities:

  • Define architecture, lead the design effort, implementation and FPGA validation
  • Lead the project by developing design specifications, conducting hardware architecture and design tradeoffs
  • Work in close collaboration with the team, customers and internal customers including ASIC Designers, Verification and Firmware
  • Coordinate with Design Manager for product /service requirements and scheduling activities
  • Prepare Project database according to release process upon completion of the project
  • Write top level Design Document
  • Write System level verification requirements
  • Prepare Data Sheet and User Guide
  • Work on-site/travel, as and when required

Education Required:

  • BS / MS - Electronics and Communication OR
  • BS / MS - Electronics and Electrical
Submit your resume now to hr@sibridgetech.com